Bc127 vregen pull up

Dear,

The EVM always powers up fine without pressing the Push Button that pulls up VREGEN pin to 3.3V. I designed a small board only to test BC127-HD and it also always powers up fine with VREGEN pin being floating only if 3.3V is applied to pin 30, 31, 32, 33, 34.

But, after I integrated BC127-HD into audio main board with VREGEN pin floating, BC127-HD powers up only by chance. Therefore, I pulled up VREGEN pin by 10k resistor and then, BC127-HD powers up always fine.

According to the ‘Power Supply Sequencing’ on Figure 5-1 in ‘Product Technical Specification’ document, VREGEN pin must go high 5ms after power is on and RST# pin must go low also 5ms after VREGEN pin goes high. The ‘Power Supply Sequencing’ is too difficult to realize only by simple HW and it also requires two dedicated GPIO if it is realized by MCU.

Question:
Is it OK to power up, if VREGEN pin is simply pulled up and does not follow the complex ‘Power Supply Sequencing’ strictly?

Meanwhile, the RST# pin does not seem to affect the power up results whether it is pulled up or not and how much capacitance is shunted to ground.

Thanks for all.

Hey my friend,

I understand this is an old post. But we recently faced the same problem in our design.

Our initial board worked fine with VREGEN pin floating, while all pins 30, 31, 32, 33 and 34 pulled high. The initial boards powered up fine.

In the second PCB release, this changed. We have to pull VREGEN pin high. If not, BC127 won’t boot up at all after power up.

So my question is same: is VREGEN pulled high all time is sufficient for BC127 to boot up very time? Or do we have to follow “Product Technical Specification” document, VREGEN pin must go high 5ms after power is on and RST# pin must go low also 5ms after VREGEN pin goes high.

If the guideline is required to be followed, then what happens to the design that doesn’t have MCU to interface with BC127? How would we manage 5ms timing without another MCU?

Thanks for all.

Hi,

Yes, VREGEN can be tied to VBAT but an external delay of 5 ms is required between VBAT
being powered and VREGEN being asserted high. A fast-rising edge on VREGEN must
be provided to enable the module, the circuit in below Figure provides this fast-rising edge to
enable the module to start when VREGEN is tied to VBAT.

BC127 VREGEN Delay Circuit

The recommended delay circuit if you are using the supply to the module as a reference for the delay. If VREGEN is controlled digitally from a PIC or HOST. You then can add the delay in the controller.

If possible, Could you please mark “Solution” on the answer? So the community could easily find the solution for their problems.

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Donald,

Thank you for the reply. Especially for the reference design. This is a solid “Solution”.

Thanks,