Is it possible to disable wp7702 UART autosleep on Octave / Legato / WP7702 UARTs?
We think the default is set to 5 seconds. After 5 seconds with no data the UART sleeps - after this data into the WP7702 UART arrives at the OS corrupted. We don’t know how long the corruption lasts before the data stream is OK.
at+ksleep=? +KSLEEP: (0-2) OK at+ksleep? +KSLEEP: 1 OK
My colleague has tested setting at+ksleep=2 without success. He also tried modifying /sys/devices/platform/msm_serial_hs.0/power/autosuspend_delay_ms
Is the issue FW version specific?
A general Legato / OS issue?
I partially raised this issue in this post. But I think it needs an individual tread.
The original post was concerned with the wake-up method - what is the UART wake specification for the mangOH?