The datasheet indicates the pin is high-impedance pull-down, but when DTR is not asserted in the mode that follows it appears the pin floats.
AT&D0
AT+KSLEEP=0
Deassert DTR, at times will get spurious edges through our level translator. Adding a 1 Mohm pull-down resolves the issue from the HL RX (output line).
What is the expected behavior of the RX line on the HL8548 when DTR is deasserted in the condition above? Asserted, everything works as expected.
Hi,
Generically speaking if at&d is set to 0 DTR has no effect on anything, high or low. Are you seeing different?
Regards
Matt
Hi Matt,
Yes, when DTR is asserted, RX is HIGH. When DTR is deasserted, we see high frequency noise on the output of a level translator. When we probe the HL RX line on the radio side, the 1 Mohm impedance of the probe makes the issue go away. It is intermittent, but with a testpoint to the HL RX line, touching it with a finger fairly reliably replicates the issue.
When things settle out, the HL RX line goes low until DTR is asserted again when it goes high.
This fills our UART buffer with junk data and has caused a few issues due to the assumption nothing would come across RX when DTR is deasserted.
See the capture from the output of the buffer (MCU side, buffering the HL RX Output) (note, we did not probe the radio side in this capture, it eventually settled out…but is not always the case. We have seen continuous oscillations at times):
Yellow is DTR, Blue (Aqua) is RX on the MCU side of the level translator
Thanks,
–Rob