BC127 I2S Configuration

IoT Modules
1

Hello
In BC127 software user manual page 157 there is an example for I2S configuration:

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If resolution is 16bit, and sampling rate is 44.1KHz, Bit clock for stereo should be:
2 channels X sampling rate X resolution = 2 X 44.1KHz X 16 = 1.411200MHz
not 2.822400MHz…why is the bit clock in the example is twice the calculated value?
Thanks you all
Nir

2

you can see page 86:

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3

Hi
I have seen this and still it does not explain why does BCLK in not 2 x 16bit x 44.1KHz
Can you explain why 44.1KHz in multiplied by 64 and not by 32?
Thanks
Nir

4

What is the problem now actually?

I saw the 64 is the bit clock scale factor, maybe it has extra idle bclk cycle ( that means it is not fully packed)