Pull-state of GPIO 19,23,26,27 on IESM board and UART2


#1

Hi, I’m looking for some info about the pull state of the GPIO 19,23,26,27 when they are set to input, because I try to catch impulse on them and if I don’t add pull-down on them most of time I don’t see level events …

Another question, is about the UART 2 on IESM too, there is an Open Drain buffer on Rx and Tx Pin ??


#2

The UART2 connections on the IESM 16-pin connector are RS232.


#3

Yes I know that, but did there is an internat open drain buffer ?


#4

If it’s RS232, it can’t be open-drain can it?

RS232 is a bipolar drive: it is either driving to +12V (ish) or driving to -12V (ish)


#5

arf ok…
I would like to implement the Application note 214 from Maxim: “Using a UART to implement a 1-Wire Bus Master” with the UART2 of the fastrack to log temperature. Do you think it’s realisable and how to interface it with Fastrack UART?
They talk about NC7WZ07 component but I can find it, did there is an equivalent?


#6

And what about my poll-up/down question ? I know that on ARM processor, we can whot Poll/up/Down/… state by the code.


#7

The Fastrack Supreme contains a Q2686 - so you need to look in the Q2686 Datasheet (Product Technical Specification, PTS) for details…


#8

Also look in the Fastruck User Guide - see the section about the IES Connector;

Also look in the IESM User Manual - see the section about GPIO;

Also look in the IESM PTS - see the section about “Electrical Information for Digital I/O”.