Can Open-AT do *Full* Duplex SPI yet?

See also: viewtopic.php?f=121&t=1653&start=0

Has this been sorted-out yet?
Can Open-AT now properly do Full-Duplex SPI - ie, while it is clocking data out on MOSI, it also clocks data in on MISO :question:

I ask because I’ve just been looking at the Datasheet for the MAX3110/MAX3111 SPI/MICROWIRE-Compatible UART

As they say, this is “normal operation” for SPI devices - so it’s pretty daft if Open-AT can’t do it!

Apparently not! :unamused:

The ADL User Guide v6.31 still documents adl_busWrite() purely as an output function: there is no mention of data being clocked-in on MISO while the data from adl_busWrite() is clocked-out on MOSI - let alone any description of how one would access any such received data!


I was wondering if open-at can do full duplex now. I am currently using the ADC122S101 and from looking at the timing diagram, it seems the device only works in full duplex mode not half duplex.


Good afternoon “gozilla2007”, :slight_smile:

As stated in the PTS of the Q26 device, the SPI peripheral on the device is configurable as half duplex, not full duplex.
The APIs also indicate that reads and writes take place independantly from each other.


Yes - but that is a very major limitation that makes the SiWi SPI port useless in the majority of standard SPI applications! :unamused:

The point is: are SiWi ever going to fix this glaring omission?

Why can SiWi only provide these crippled implementations, useless for so many standard reuirements?! :unamused:

I2C is just as bad:


I’m also trying to implement the SPI bus on the Q2686 and Q2687RD. I installed the latest firmware 7.45.
But still without result. It’s not possible to send and receive at the same time on the MISO and MOSI pins.
Is there anyone who has already achieved an SPI in full duplex?

It’s like everybody said pretty standard to work with the MISO and MOSI pin on the SPI bus.

Thanks if someone has a good solution.

Do you have any reason to believe that this should do full-duplex SPI?

As noted above, no matter how disappointing & frustrating it may be, the half-duplex limitation is clearly documented.

The electronic device I’m currently using supports only full duplex mode. I must use the MOSI an MISO pins.

In the mean time I fixed the problem and could connect to the device using the MOSI an MISO pins.

For the benefit of others who may wish to do the same or similar, would you care to share your solution?

static s32 hspi;
static adl_busSPISettings_t spichip =
	127,						//Master max freqclock = 13000/(1+127)~= 102 kHz
	ADL_BUS_SPI_CLK_MODE_0,		//rest state 0, data valid on rising edge.
	ADL_BUS_SPI_ADDR_CS_GPIO,	//CS_HARD does not work!
								//use the reserved hardware chip select pin.
	ADL_BUS_SPI_CS_POL_LOW,		//Chip select signal is low level.
	ADL_BUS_SPI_MSB_FIRST,		//Send msb bit first.
	ADL_IO_GPIO | 31,			//We use a gpio for chip select
	ADL_BUS_SPI_LOAD_UNUSED,	//The load signal is unused.
	ADL_BUS_SPI_DATA_UNIDIR,	//3 wire mode miso, mosi and clk.
	ADL_BUS_SPI_MASTER_MODE,	//bus is used in master mode.
	ADL_BUS_SPI_BUSY_UNUSED		//The busy signal is not used.

void Init()
        hspi = adl_busSubscribe(ADL_BUS_ID_SPI,1,&spichip); //select spi port 1

        u32 addsize =8;
        adl_busIOCtl(hspi, ADL_BUS_CMD_SET_ADD_SIZE,&addsize);

void ReadSpi()
	u8 i, data = 0;
	adl_busAccess_t address = {0,0};
		address.Address = ((u32)i)<<24;
		WriteDebugMsg("Read data on addres 0x%02x, data 0x%02x.\r\n",i,data);

I first set the SPI settings. Selecting the CS_HARD (chip select hardwarepin) parameter does not work so I use a the same pin but in gpio mode.

The spi clock speed is set to the lowest value but this can be modified of course.
The register size of my device is 8-bit (cs is selecting the device). To access this one I’m setting the address length to 8-bit. Don’t forget to shift the address, it’s using 32 bits. See the ADL_user_guide for more details.

In this example I only read one byte at a time for the first 9 register.

Hopefully this will help you a step foreward.

I don’t see how this helps to access a Full-duplex slave with the Open-AT Half-duplex limitation? :confused:

Actually, I’m not sure if the limitation lies in Open-AT, the SiWi firmware, or the hardware - or some combination of the three…?

Setting the bus SPI settings in full duplex is done with ‘ADL_BUS_SPI_DATA_UNIDIR’.
In this case your using a 3 wire interface. CLK,MISO,MOSI
Setting the SPI parameter to ‘ADL_BUS_SPI_DATA_BIDIR’ will set the SPI in half duplex mode.
Now you will use only 2 wires CLK and I/O SPI. One wire to send and receive the data from the slave (=half duplex).

Aha - in that case, you’re saying that Full-Duplex is now supported.

ie, this is a change in the newer firmware - which does remove the previous limitation.

That would be good news!


Do you know when this was added?

Don’t make a mistake! ‘ADL_BUS_SPI_DATA_UNIDIR’ & ‘ADL_BUS_SPI_DATA_BIDIR’ already exist since 6.xx FW.
They only set the configuration of data lines.

To have a Full-Duplex communication we would need an adl_busWrite function which receives data during its write, which (as far as i know) is not available.

best regards,
Gregor Bader

Indeed - I was just checking my old documentation, and found the same thing.

… and I just checked my old code, and found the same thing.


That would appear to be still the case.


It’s the first time I’m using the SPI bus. Currently R7.43 is running on my Q2687.

Hello guys, with the intruction adl_busRead you can write and read data at the same time. Use the adl_busAccess_t table!

Note that adl_busRead is a function - not an “instruction”.

No, you can’t.

The address & opcode from the adl_busAccess_t table are sent first, and then the read is performed - this is half-duplex.