Parallel Port Addressing 2687


#1

We are waiting for our 2687’s and up until now have been using the 2686 to develop, but we need to ues the parallel port service.

Reading the documentation on the parallel port service I’m a little unclear as to how it “addresses” a peripheral.

For instance it seems clear that CS3 and A1,A24 and A25 can work together as chip selects, but examples show multiple reads and writes at a location specified by the above address pin settings, but if I read ( or write ) 100 items, do I read those 100 items at the same location?

From what I see, I will need to generate an adress sequencing scheme or address latches to produce particular addresses within a given selection.

Is this correct, or have I missed something.

David


#2

My understanding is that the Parallel Port interface was only designed to be used with LCDs and NAND flash. It is not intended for Random Access devices such as RAM. If you use a WMP100 then you have access to all address lines.