[Hilo] GPS Standard is using HiLoNC V2 FW 3.00 with RTS/CTS HW flow control enabled. The host processor do not have buffer on UART and it generates an RTS Low (+V) at each character when it sends AT command, modules reply with CR-LF but OK is completely lost like HiloNC flushed its buffer. Is there any restriction about RTS timing? How to avoid HiloNC clears its buffer?
Answer: One byte transmitted at 115200 baud takes 86ms to be sent.
If you change the state of the CTS/RTS every 86ms, of course the module will be down.
It’s a matter of fact that no operating system can manage such behavior on the flow control.
So from my understanding, there is no other way than increase the buffer on the customer CPU side.
The module will never support this kind of extreme usage of the UART.
Thanks you for your understanding.