SL8082T with SPI and more than 1 CS

We use SL8082T and have to have different SPI slaves to use. Port-Expander, memory, Sub-GHz wireless module. All of them communicate with SPI to their host. So we have to use at least 3 chip-selects, all of them low active. SL808X offers one CS “in hardware”, but the library-functions offer “GPIO chip-selects”. As we use analogue audio and we wanted to use layout-friendly GPIOs, we tried with GPIO9 to GPIO11, default PCM ports but in MUX1 available as GPIOs.
With parameter ADL_BUS_SPI_ADDR_CS_GPIO and ADL_IO_GPIO | 9 in struct adl_busSPISettings_t we expected to have GPIO 9 as chip-select in command adl_busWrite(); With the command SPI clock and MOSI deliver their data correct - but there is no reaction at the CS line. If we use hardware chip-select (/SPI1_CS) or GPIO 1 as chip-select the function is ok. But with “higher order” GPIOs we get no low at the CS line. CS line is pulled up to 1.8V and the slave is connected via level translator LSF0204.
Firmware is 7.54

Any help appreciated.

How about using ADL_BUS_SPI_ADDR_CS_NONE and managing the CS lines manually? So allocate GPIOs for the CS signals and set them manually to low or high, depending on which device you’re addressing, before reading or writing from or to the SPI bus.

Thanks for the hint. But that is not the way a reasonable programmer would do it. You have to use a timer to get the CS high again. Thats overhead a soberly programmed library function would not need. What i miss here is a reaction from guys from Sierra Wireless. Folks, ist your business to support your customers here - is it?
Asks
Harald Wehner